Ramsey Electronics QRP30 Manual de instrucciones Pagina 8

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QRP30 8
CIRCUIT DESCRIPTION:
In brief, Q1 is a crystal oscillator, amplified by buffer stage Q2, which drives
Q3 as the RF output amplifier. Q4 is a PNP keying circuit which opens and
closes the 12VDC supply line to Q1 and the T-R circuitry of D1 and D2.
S1 selects either of two crystals. R1,D3,D4 and L1 form a varactor controlled
series resonant circuit with the crystal. Adjusting R1 permits a crystal
frequency swing of up to 5 KHz, about the crystal frequency.
Q3 is a Class C RF amplifier that amplifies the RF output of Q2 to the final RF
power output level.
L6,C17 and C18 form a low pass filter (Butterworth) to match the output of Q3
to the antenna and reduce harmonics to acceptable levels as specified by the
FCC.
When the keying line is closed, Q4 conducts +12VDC to the oscillator stage,
applies a positive bias to the base of Q2 through R8, and +12VDC through
choke L4 to the anode of D1, which permits RF to pass through D1 to the filter
network while applying negative bias to D2 which blocks RF from passing to
the receiver. When the keying line is open, the +12VDC applied to D2 through
R13 permits D2 to conduct from the antenna jack to the receiver jack. The
buffer and amplifier stages are not keyed, resulting in clean keying, free of
chirps and clicks.
BLOCK DIAGRAM:
Q1
OSC.
Q2
BUFFER
Q3
FINAL
AMP
D1,D2
DIODE
SWITCH
C17.L5,C18
LOW PASS
FILTER
A B
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